As an electrically rewritable non-volatile memory, a flash memory is heretofore known in which memory cells each having a floating gate structure are NAND-connected or NOR-connected to form a memory cell array. Moreover, a ferroelectric memory is known as a non-volatile memory which enables high-speed random access.
Meanwhile, a resistance varying memory using a variable resistor for a memory cell has been proposed as a technique to achieve further miniaturization of memory cells. Known examples of the variable resistor include: a phase-change memory element which causes a resistance value to change according to a state change of a chalcogenide compound between a crystalline state and an amorphous state; a MRAM element which uses resistive changes induced by the tunnel magneto-resistance effect; a polymer ferroelectric RAM (PFRAM) memory element in which a conductive polymer is used for forming a resistor; and a ReRAM element which causes resistive changes by the application of electrical pulses (refer, for example, to Japanese Unexamined Patent Application Publication No. 2006-344349).
In the resistance varying memory, a memory cell can be formed by a series circuit of a Schottky diode and a resistance varying element instead of a transistor. Accordingly, the resistance varying memory is advantageous in its easy lamination and in enabling higher integration by designing it to have a three-dimensional structure (refer, for example, to Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2005-522045).
However, in the case of the resistance varying memory, the wiring resistance in an access path to a memory cell is different from one memory cell to another, as in the case of the other non-volatile memories. This causes variation in data write/erase/read characteristics among the memory cells. As a technique to compensate this variation, there is a method of increasing the height of a pulse applied on each memory cell by the amount corresponding to the voltage drop due to the wiring resistance in the corresponding access path. However, in a data erase operation, in which a resistance varying element is changed from a low-resistance state to a high-resistance state, this method also has a problem. Because, if the pulse is applied on the memory cell for a long period of time, re-programming of data may occur in which the resistance varying element is switched to the low-resistance state again immediately after being switched from the low-resistance state to the high-resistance state once.